1. Field of the Invention
The present invention relates generally to a semiconductor fabrication method and, more particularly, to an improved shallow trench isolation (STI) process and a process of treating bottom surface of the shallow trench to avoid bubble defects induced by the silicon nitride liner formed on the shallow trench bottom.
2. Description of the Prior Art
In the fabrication of semiconductor devices, isolation structures such as shallow trench isolation (STI) are formed between active areas in which electrical devices such as transistors or memory cells are to be formed. The isolation structures are formed in an early stage of the processing of a semiconductor substrate, typically prior to the formation of the transistors.
To form the STI structure, a pad oxide layer and a pad nitride layer are typically formed over the substrate surface and patterned to expose only the isolation regions, with the prospective active device regions covered. The pad nitride layer acts as a hard mask during subsequent processing steps, and the pad oxide layer functions to relieve stress between the underlying silicon substrate and the pad nitride layer. These two layers can be together called as a hard mask layer.
A dry etch is then performed to form a shallow trench through the nitride, pad oxide layer, and substrate. Dielectric material such as high-density plasma chemical vapor deposition (HDPCVD) oxide is then deposited to fill the shallow trench. Thereafter, the excess dielectric material is polished away using a chemical mechanical polishing (CMP) process and the pad nitride layer is removed.
For a good insulating quality, after the shallow trench is formed by etching, a thermal oxidation is performed to form an oxide liner with a thickness of about 150 angstroms (Å) on the walls and bottom of the shallow trench and etching damage is eliminated at the same time. Before the shallow trench is filled with a dielectric layer, a thin silicon nitride liner is typically deposited using a CVD process to form a double layer structure, serving as an effective oxygen barrier to block oxygen diffusion, and to reduce lattice defects generated in the silicon substrate. However, after a dielectric layer is filled in the shallow trench using an HDPCVD process, some bubble defects are often found between the oxide liner and the silicon substrate. Such defects lead to delamination between the oxide liner and the silicon substrate and influence properties of products.
Therefore, there is still a need for an improved process to make an STI to prevent the bubble defects.